1. Field of the Invention
The present invention relates generally to integrated circuits and more specifically, the present invention relates to high voltage transistors used in integrated circuits.
2. Related Application
This application is related to co-pending application Ser. No. 08/623,969, filed Mar. 29, 1996, entitled "Method and Apparatus for Providing High Voltage With A Low Voltage CMOS Integrated Circuit," and assigned to the Assignee of the present application.
3. Description of the Related Art
In the integrated circuit industry there is a continuing effort to increase circuit speed as well decrease integrated circuit device sizes. Modern microprocessors contain an increasing number of devices in smaller areas of integrated circuit substrate. To achieve this increased packing density, integrated circuit devices are "scaled" in size and reduced in dimension. A consequence of this scaling is that oxide thicknesses and junction breakdown voltages are reduced proportionally. Although reducing the oxide thicknesses may be necessary when reducing the overall sizes of transistor devices, the associated thinner oxides are problematic for high voltage transistors.
Since the voltage levels that can be tolerated by state-of-the-art integrated circuits is constantly decreasing, the maximum input and output voltages that are generated by such integrated circuits is decreasing correspondingly. Consequently, ordinary modern integrated circuits are low voltage tolerant and are therefore unable to interface with high voltage devices without suffering gate oxide or junction breakdown.
One application which requires the application of high voltages from a low voltage tolerant circuit is the programming of discretionary connections such as antifuse devices or the like. Antifuse devices are used as programming elements in electrically programmable read only memory (PROM). When an antifuse device is initially fabricated, it provides a high resistance connection. However, after the antifuse is programmed, or fused, it provides a permanent low resistance electrical connection.
Unfused antifuse devices are generally programmed with the application of a high programming voltage and current. After the application of the programming voltage and current, the antifuse is permanently programmed from a high resistance to a low resistance electrical connection.
One problem with programming antifuse devices with low voltage tolerant CMOS integrated circuits is that the voltages required to fuse the device often exceed the maximum junction breakdown voltage limits of ordinary CMOS integrated circuit transistors. As described earlier, with the trend of integrated circuit device sizes being scaled down, the maximum gate and junction breakdown voltages of many modern integrated circuit processes are continuing to decrease. Consequently, modern prior art CMOS circuits are unable to tolerate the high programming voltages required to program antifuse devices without expensive modifications to the manufacturing process.
Some prior art techniques of implementing low voltage tolerant circuits capable of providing a high voltage output are described in U.S. Pat. No. 5,399,917 entitled "High Voltage Tolerant Switch Constructed for a Low Voltage CMOS Process" and U.S. Pat. No. 5,434,531 entitled "High Voltage Tolerant Switch Constructed for a Low Voltage CMOS Process." Each of the above-listed prior art patents are assigned to the Assignee of the present invention.
FIG. 1 is an example of one prior art integrated circuit 10 which is capable of providing a high voltage output at node 29. Prior art circuit consists of ordinary low voltage CMOS transistors including p-channel transistor pair 20 and 21 coupled in series between VPP and output node 29. Resistor 25 and n-channel transistor pair 26 and 28 are coupled in series between output node 29 and ground.
In the prior art embodiment shown in FIG. 1, VPP is a high voltage which may be greater than that which prior art circuit 10 is designed to tolerate across any individual transistor gate to drain, gate to source, or between drain to source. Assuming n-channel transistor 28 is switched on, output node 29 is pulled down to ground through n-channel transistors 26 and 28. Thus, assuming VPP is 7 volts, 7 volts are distributed across p-channel transistor pair 20 and 21. With the substrate of p-channel transistor 20 coupled to VPP, the substrate of p-channel transistor 21 coupled between the source and drain of transistors 20 and 21, and the gates of p-channel transistors 20 and 21 coupled to 3.5 volts, there are no p-channel transistor gate to drain, gate to source or drain to source connections that are subjected to the entire 7 volts of VPP.
However, assuming n-channel transistor 28 is switched off, output node 29 is pulled up to VPP. Accordingly, 7 volts are distributed across n-channel transistors 26 and 28. Although there are no n-channel transistor gate to drain, gate to source or drain to source connections subjected to 7 volts, the drain to substrate junction of n-channel transistor is subjected to the entire 7 volts.
Consequently, the breakdown voltage of the drain to substrate junction of a transistor configured such as of n-channel transistor 26 determines an upper limit to the maximum amount of voltage which may be supplied by low voltage integrated circuits such as prior art circuit 10. As the trend towards smaller devices with higher packing density continues in the integrated circuit industry, the problems associated with the breakdown voltage of the drain or source to substrate junctions in transistors becomes increasingly significant.
Therefore, what is needed is a high voltage transistor which would not limit the maximum amount of voltage which may be supplied by low voltage integrated circuits. To keep costs as low as possible, such a high voltage transistor would be implemented in an existing state-of-the-art CMOS process without adding any costly process steps, such as masking, implantation or doping. The high voltage transistor would be useful in a number of high voltage applications such as antifuse programming, or any other application that requires interfacing low voltage integrated circuits with high voltage devices. Other applications in which such a high voltage transistor might be useful include EPROM programming, interfacing with high voltage buses, driving liquid crystal displays etc.